Road-blocks to Tera-level nanoelectronics

The national program for Tera-level Nanodevices (TND) serves as a frontier research resource to a broad range of nanoscale electronics areas. Outstanding nanoscale devices have been achieved and are being further developed using core technologies such as fast nanoscale molecular assembly, damage-free nano-etch process with a neutral beam and nano-rod and particle formation technology. Sub-30 nm scale nonvolatile memory arrays have been demonstrated by changing structures and materials. Using high quality heterojunction epitaxial growth technology, ultra high speed HEMT devices have been demonstrated with cut-off frequencies of approximately 610 GHz corresponding to gate length of 15 nm. Additionally, single electron transistor logic circuits have been extended to multi-valued static random access memory applications.