Transient substrate current effects on n-channel MOSFET device lifetime

Author

Wang, H. ; Davis, M. ; Lahri, R.

Author_Institution

Nat. Semicond., Puyallup, WA, USA

fYear

1988

fDate

11-14 Dec. 1988

Firstpage

216

Lastpage

219

Abstract

The n-channel MOSFET transient substrate current during dynamic hot-carrier stressing has been found to be a strong function of the rise and fall time of the gate/drain voltages. At fast rise and fall times (<10 ns), the displacement current associated with the dynamic stressing becomes a significant portion of the transient substrate current. The magnitude and direction of displacement current significantly affects the extent of the device degradation. The nature of the transient substrate current and its effect on MOSFET device lifetime is demonstrated here. Device degradation is found to depend on the circuit environment in terms of bias conditions. Therefore, performance degradation due to hot carriers is also dependent on the application of the MOSFET in the circuit. A BiCMOS 15-ns 256 K SRAM (static random access memory) is used to demonstrate this methodology.<>

Keywords

BIMOS integrated circuits; VLSI; hot carriers; insulated gate field effect transistors; integrated memory circuits; random-access storage; 10 ns; 15 ns; 256 kbit; BiCMOS; SRAM; bias conditions; circuit environment; device degradation; displacement current; dynamic hot-carrier stressing; dynamic stressing; fall times; gate/drain voltages; n-channel MOSFET device lifetime; performance degradation; rise times; static random access memory; transient substrate current effects; BiCMOS integrated circuits; Circuit simulation; Degradation; Hot carriers; Impact ionization; MOSFET circuits; Random access memory; Stress; Substrates; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Type

conf

DOI

10.1109/IEDM.1988.32794

Filename

32794