Characterization of micro-bump C4 interconnects for Si-carrier SOP applications

Author

Wright, S.L. ; Polastre, R. ; Gan, H. ; Buchwalter, L.P. ; Horton, R. ; Andry, P.S. ; Sprogis, E. ; Patel, C. ; Tsang, C. ; Knickerbocker, J. ; Lloyd, J.R. ; Sharma, A. ; Sri-Jayantha, M.S.

Author_Institution

IBM T. J. Watson Res. Center, Yorktown Heights, NY

fYear

0

fDate

0-0 0

Abstract

This paper describes yield, contact resistance, and preliminary reliability test results on micro-bump C4 interconnects in modules containing Si-chips and Si-carriers. Modules containing eutectic PbSn or SnCu bump solders were fabricated with high yield, with similar interconnect contact resistances for both solders. The contact resistance and reliability test results to date suggest that reliable, high-current, high-density bump interconnections can be achieved for Si-carrier technology

Keywords

contact resistance; copper alloys; eutectic alloys; integrated circuit interconnections; integrated circuit reliability; integrated circuit yield; lead alloys; silicon; solders; system-in-package; tin alloys; PbSn; Si; Si-carrier SOP; Si-carrier technology; Si-chips; SnCu; eutectic PbSn solders; eutectic SnCu bump solders; high-density bump interconnections; interconnect contact resistances; microbump C4 interconnects; reliability test; Ceramics; Contact resistance; Gallium nitride; Packaging; Power system interconnection; Resists; Rivers; Silicon; System testing; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 2006. Proceedings. 56th

Conference_Location

San Diego, CA

ISSN

0569-5503

Print_ISBN

1-4244-0152-6

Type

conf

DOI

10.1109/ECTC.2006.1645716

Filename

1645716