• DocumentCode
    2141733
  • Title

    Design of a dynamic reconfigurable multi-grained hardware architecture with adaptive runtime routing

  • Author

    Thomas, Alexander

  • Author_Institution
    Inst. fur Technik der Informationsverarbeitung, Univ. Karlsruhe, Denmark
  • fYear
    2005
  • fDate
    24-26 Aug. 2005
  • Firstpage
    745
  • Lastpage
    746
  • Abstract
    Currently the HoneyComb architecture is already implemented in VHDL and ready for tests. At the moment, testing, synthesis and layouting work of the architecture on TSMC 90 nm standard cell technology is ongoing. For the presentation I am planning to introduce the HoneyComb architecture in detail and giving an outlook on planned software tools as well as first application results. Furthermore the definition of the HoneyComb-language will be introduced which is defined for abstract programming purposes to ease the usability of the architecture.
  • Keywords
    VLSI; integrated circuit design; network topology; 90 nm; HoneyComb architecture; HoneyComb language; VHDL; adaptive runtime routing; reconfigurable multigrained hardware architecture; software tools; Batteries; Clocks; Frequency; Global communication; Hardware; Multimedia systems; Routing; Runtime; Topology; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications, 2005. International Conference on
  • Print_ISBN
    0-7803-9362-7
  • Type

    conf

  • DOI
    10.1109/FPL.2005.1515836
  • Filename
    1515836
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2141733