• DocumentCode
    2142242
  • Title

    A Control Circuit Synthesis Method for Asynchronous Circuits in Bundled-Data Implementation

  • Author

    Konishi, Takao ; Hamada, Naohiro ; Saito, Hiroshi

  • Author_Institution
    Univ. of Aizu, Aizu-Wakamatsu
  • fYear
    2007
  • fDate
    16-19 Oct. 2007
  • Firstpage
    847
  • Lastpage
    852
  • Abstract
    This paper proposes a control circuit synthesis method for asynchronous circuits in bundled-data implementation. Our proposed method consists of the synthesis of a control circuit to control a data-path circuit and the synthesis of an interface circuit between the control circuit and the data-path circuit. The control circuit is generated by mapping small control elements called Q-elements. For mapping, this paper proposes two mapping methods called the state-oriented mapping method and the node-oriented mapping method. Finally, this paper shows the effectiveness of the proposed method by comparing synthesized circuits with ones obtained by a different control circuit synthesis method.
  • Keywords
    asynchronous circuits; logic design; Q-elements mapping; asynchronous circuits; bundled-data implementation; control circuit synthesis; data-path circuit; interface circuit; node-oriented mapping; state-oriented mapping; Asynchronous circuits; Circuit synthesis; Clocks; Control system synthesis; Delay effects; Energy consumption; Logic circuits; Signal synthesis; State-space methods; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer and Information Technology, 2007. CIT 2007. 7th IEEE International Conference on
  • Conference_Location
    Aizu-Wakamatsu, Fukushima
  • Print_ISBN
    978-0-7695-2983-7
  • Type

    conf

  • DOI
    10.1109/CIT.2007.92
  • Filename
    4385191