• DocumentCode
    2142268
  • Title

    Combining RAM technologies for hard-error recovery in L1 data caches working at very-low power modes

  • Author

    Lorente, Vicente ; Valero, Alejandro ; Sahuquillo, Julio ; Petit, Salvador ; Canal, Ramon ; Lopez, Pedro ; Duato, Jose

  • Author_Institution
    Department of Computer Engineering, Universitat Politècnica de València, Spain
  • fYear
    2013
  • fDate
    18-22 March 2013
  • Firstpage
    83
  • Lastpage
    88
  • Abstract
    Low-power modes in modern microprocessors rely on low frequencies and low voltages to reduce the energy budget. Nevertheless, manufacturing induced parameter variations can make SRAM cells unreliable producing hard errors at supply voltages below Vccmin.
  • Keywords
    Arrays; Capacitance; Capacitors; Program processors; Proposals; SRAM cells;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013
  • Conference_Location
    Grenoble, France
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4673-5071-6
  • Type

    conf

  • DOI
    10.7873/DATE.2013.031
  • Filename
    6513477
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2142268