Low power consumption scheduling based on software Fault-tolerance

The space computer puts forward high demands on the performance. Therefore, the high-performance digital signal processors are increasingly used in the space computer. However, the single particle effects caused by the cosmic radiation make the reliability of the space computer become a huge challenge. The COTS DSP chip has a huge advantage compared to the antiradiation DSP chip in performance, price, size and weight. The software implemented fault-tolerance technique can protect the program, but degrade the system performance and increase the power consumption. According to the DSP structural characteristics and in the premise of not reducing the detecting error ratio, this paper proposes an instruction scheduling method for the low power consumption, to reduce the overheads in terms of the performance and the energy incurred by the fault-tolerance technique.