DocumentCode :
2142676
Title :
Real-time implementation of 16 kb/s low-delay CELP speech coding algorithm on a TMS320C30
Author :
Hui Guanghui ; Tian Wenshun ; Ni Weizhen ; Wang Dejun
Author_Institution :
Beijing Univ. of Posts & Telecommun., China
Volume :
3
fYear :
1993
fDate :
19-21 Oct. 1993
Firstpage :
283
Abstract :
The 16 kb/s LD-CELP speech coding algorithm is submitted by AT&T to CCITT for the 16 kb/s speech coding standard which can be used in many applications. After having investigated the algorithm carefully and simulated it in FORTRAN and DSP TMS320C30 assembly language respectively the authors find that the difficulty implementing the 16 kb/s LD-CELP algorithm on a TMS320C30 is the large computational load and rather uneven distribution among 8 vectors in the same adaptation cycle. Some techniques are used in the program to reduce the computational load and a recursive window is used to compute autocorrelation functions. At last, the authors employ about 90% processor time of a TMS320C30 to implement the 16 kb/s LD-CELP coding algorithm in real-time.<>
Keywords :
codecs; digital signal processing chips; linear predictive coding; real-time systems; speech coding; vocoders; 16 kb/s LD-CELP speech coding algorithm; 16 kb/s low-delay CELP speech coding algorithm; 16 kbit/s; DSP TMS320C30 assembly language; FORTRAN; TMS320C30; adaptation cycle; autocorrelation functions; computational load; real-time implementation; recursive window; Bit error rate; Decoding; Delay; Digital signal processing; Filters; Linear predictive coding; Sampling methods; Speech analysis; Speech coding; Speech synthesis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on
Conference_Location :
Beijing, China
Print_ISBN :
0-7803-1233-3
Type :
conf
DOI :
10.1109/TENCON.1993.327977
Filename :
327977
Link To Document :
بازگشت