Si/sub 3/N/sub 4//SiO/sub 2/ spacer induced high reliability in LDD MOSFET and its simple degradation model

Hot-carrier effects of an n-channel LDD (lightly doped drain) MOSFET with Si/sub 3/N/sub 4//SiO/sub 2/ sidewall were investigated. As the oxide thickness under the nitride film spacer becomes thin, the initial degradation of the drain current becomes large, whereas its stress-time dependence becomes small. Moreover, relaxation of the drain current degradation in MOSFETs with only Si/sub 3/N/sub 4/ spacer appears at room temperature. It is found that the stress-time dependence of the drain current is explained by a simple model including only the sidewall oxide thickness and the gate electric field.<>