DocumentCode :
2144120
Title :
Efficient SAT-based dynamic compaction and relaxation for longest sensitizable paths
Author :
Sauer, Matthias ; Reimer, Sven ; Schubert, Tobias ; Polian, Ilia ; Becker, Bernd
Author_Institution :
Albert-Ludwigs-Universität Freiburg, Georges-Köhler-Allee 051, 79110, Germany
fYear :
2013
fDate :
18-22 March 2013
Firstpage :
448
Lastpage :
453
Abstract :
Comprehensive coverage of small-delay faults under massive process variations is achieved when multiple paths through the fault locations are sensitized by the test pair set. Using one test pair per path may lead to impractical test set sizes and test application times due to the large number of near-critical paths in state-of-the-art circuits.
Keywords :
Circuit faults; Compaction; Delays; Encoding; Logic gates; Runtime; Sorting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013
Conference_Location :
Grenoble, France
ISSN :
1530-1591
Print_ISBN :
978-1-4673-5071-6
Type :
conf
DOI :
10.7873/DATE.2013.100
Filename :
6513546
Link To Document :
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