DocumentCode :
2144153
Title :
Architecture and Performance of an Alternative DAB Receiver Chip Set
Author :
Clawin, D. ; Bolle, M. ; Buerger, H-J. ; Heiter, G. ; DeVito, L. ; Titus, W. ; Croughwell, R. ; Goldfarb, Michael ; Schiller, C.
Author_Institution :
Robert Bosch GmbH, Robert Bosch Strasse 200, 31141 Hildesheim, Germany
Volume :
2
fYear :
1998
fDate :
Oct. 1998
Firstpage :
645
Lastpage :
650
Abstract :
A novel, dual conversion architecture for the Digital Audio Broadcasting (DAB) dual band receiver is introduced. It avoids preselection filters and minimizes the number of PLLs by first converting both L-band and Band III inputs to a common 919 MHz intermediate frequency (IF) signal which is then downconverted to the 30 MHz ADC input A carefully staged gain control strategy is used to meet the challenging sensitivity and intermodulation requirements.
Keywords :
Bandwidth; Circuit synthesis; Digital audio broadcasting; Dynamic range; Filters; Gain control; Large scale integration; Phase locked loops; Signal design; Tunable circuits and devices;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 1998. 28th European
Conference_Location :
Amsterdam, Netherlands
Type :
conf
DOI :
10.1109/EUMA.1998.338230
Filename :
4139285
Link To Document :
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