DocumentCode :
2144895
Title :
Novel low cost integration of through chip interconnection and application to CMOS image sensor
Author :
Sekiguchi, Masahiro ; Numata, Hideo ; Sato, Ninao ; Shirakawa, Tatsuhiko ; Matsuo, Mie ; Yoshikawa, Hiroshi ; Yanagida, Mitsuhiko ; Nakayoshi, Hideo ; Takahashi, Kenji
Author_Institution :
Dept. of Adv. Packaging Eng., Toshiba Corp., Kawasaki
fYear :
0
fDate :
0-0 0
Abstract :
If vertical interconnections could be fabricated at low cost, it would bring about many advantages, such as miniaturization and lower a height of the package. Our through-chip via (TCV) technology to fabricate vertical interconnections consists of a first via drilling by laser ablation (silicon drilling), followed by dielectric film lamination, a second via drilling by laser ablation (dielectric film drilling) and pattern plating of Cu. Our technology, being based on the printed-circuit-board fabrication process, has no need for expensive wafer fabrication techniques such as RIE, CVD and CMP. Thus, it enables the realization of the fabrication of through-chip vertical interconnections at low cost. In this paper, we describe the details of our process and its application in the fabrication of CMOS image sensor
Keywords :
CMOS image sensors; integrated circuit interconnections; laser ablation; CMOS image sensor; dielectric film lamination; laser ablation; low cost integration; printed-circuit-board fabrication; through chip interconnection; through-chip vertical interconnections; through-chip via; via drilling; CMOS image sensors; CMOS technology; Costs; Dielectric films; Drilling; Lamination; Laser ablation; Optical device fabrication; Packaging; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 2006. Proceedings. 56th
Conference_Location :
San Diego, CA
ISSN :
0569-5503
Print_ISBN :
1-4244-0152-6
Type :
conf
DOI :
10.1109/ECTC.2006.1645835
Filename :
1645835
Link To Document :
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