• DocumentCode
    2145122
  • Title

    Ultra-Wide Voltage Range designs in Fully-Depleted Silicon-On-Insulator FETs

  • Author

    Beigne, Edith ; Valentian, Alexandre ; Giraud, Bastien ; Thomas, O. ; Benoist, Thomas ; Thonnart, Yvain ; Bernard, Sebastien ; Moritz, G. ; Billoint, O. ; Maneglia, Y. ; Flatresse, Philippe ; Noel, J.P. ; Abouzeid, Fady ; Pelloux-Prayer, B. ; Grover, Anuj

  • Author_Institution
    CEA LETI Minatec, Grenoble, France
  • fYear
    2013
  • fDate
    18-22 March 2013
  • Firstpage
    613
  • Lastpage
    618
  • Abstract
    Todays´ MPSoC applications are requiring a convergence between very high speed and ultra low power. Ultra Wide Voltage Range (UWVR) capability appears as a solution for high energy efficiency with the objective to improve the speed at very low voltage and decrease the power at high speed. Using Fully Depleted Silicon-On-Insulator (FDSOI) devices significantly improves the trade-off between leakage, variability and speed even at low-voltage. A full design framework is presented for UWVR operation using FDSOI Ultra Thin Body and Box technology considering power management, multi-VT enablement, standard cells design and SRAM bitcells. Technology performances are demonstrated on a ARM A9 critical path showing a speed increase from 40% to 200% without added energy cost. In opposite, when performance is not required, FDSOI enables to reduce leakage power up to 10X using Reverse Body Biasing.
  • Keywords
    Doping; Energy efficiency; Logic gates; Low voltage; Random access memory; Standards; Transistors; FDSOI; Ultra Thin Body and Box; adaptive architectures; energy efficiency; low voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013
  • Conference_Location
    Grenoble, France
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4673-5071-6
  • Type

    conf

  • DOI
    10.7873/DATE.2013.135
  • Filename
    6513581