DocumentCode
2145189
Title
Design trends and challenges of logic soft errors in future nanotechnologies circuits reliability
Author
Yu, Hai ; Xiaoya Fan ; Nicolaidis, Michael
Author_Institution
TIMA Lab., Grenoble, France
fYear
2008
fDate
20-23 Oct. 2008
Firstpage
651
Lastpage
654
Abstract
Nanometer circuits are becoming increasingly susceptible to soft errors due to alpha particle and atmospheric neutron strikes as device scaling reduces node capacitances and supply voltage scaling reduces noise margins. The result is a significantly reduced reliability that becomes unacceptable in an increasingly number of applications as we move deeper to the nanotechnologies. In this context, logic soft errors, a concern for space applications in the past are a reliability issue at ground-level today. More and more techniques were used to mitigate various faults including the logic soft errors. The paper comprehensively analyzes logic soft errors sensitivity in future deep submicron processes, and also discusses the fault tolerant schemes at different design levels.
Keywords
fault tolerance; integrated circuit design; integrated circuit reliability; nanoelectronics; radiation hardening (electronics); alpha particle; atmospheric neutron strikes; circuit reliability; deep submicron process; device scaling; fault tolerant scheme; logic soft error; nanometer circuits; nanotechnology; node capacitance; voltage scaling; Alpha particles; Capacitance; Circuit noise; Logic circuits; Logic design; Logic devices; Nanoscale devices; Neutrons; Noise reduction; Voltage; Fault tolerant; Logic soft error; Nanometer;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-2185-5
Electronic_ISBN
978-1-4244-2186-2
Type
conf
DOI
10.1109/ICSICT.2008.4734615
Filename
4734615
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