• DocumentCode
    2145439
  • Title

    Dynamic voltage (IR) drop analysis and design closure: Issues and challenges

  • Author

    Nithin, S.K. ; Shanmugam, Gowrysankar ; Chandrasekar, Sreeram

  • Author_Institution
    Texas Instrum. India, India
  • fYear
    2010
  • fDate
    22-24 March 2010
  • Firstpage
    611
  • Lastpage
    617
  • Abstract
    Dynamic voltage (IR) drop, unlike the static voltage drop depends on the switching activity of the design, and hence it is vector dependent. In this paper we have highlighted the pitfalls in the common design closure methodology that addresses static IR drop well, but often fails to bound the impact of dynamic voltage drops robustly. Factors that can affect the accuracy of dynamic IR analysis and the related metrics for design closure are discussed. A structured approach to planning the power distribution and grid for power managed designs is then presented, with an emphasis to cover realistic application scenarios, and how it can be done early in the design cycle. Care-about and solutions to avoid and fix the Dynamic voltage drop issues are also presented. Results are from industrial designs in 45 nm process are presented related to the said topics.
  • Keywords
    electric potential; integrated circuit design; network analysis; dynamic IR analysis; dynamic voltage drop analysis; size 45 nm; switching activity; Design methodology; Energy management; Power distribution; Power grids; Power system dynamics; Robustness; Switches; Switching circuits; Timing; Voltage; DvD; Dynamic IR; Dynamic voltage Drop; Peak power; Power gate; Power switch; SDF; VCD;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ISQED), 2010 11th International Symposium on
  • Conference_Location
    San Jose, CA
  • ISSN
    1948-3287
  • Print_ISBN
    978-1-4244-6454-8
  • Type

    conf

  • DOI
    10.1109/ISQED.2010.5450515
  • Filename
    5450515