Title :
Implementation of FIR filter on FPGA using DAOBC algorithm
Author :
Hong, Bo ; Yin, Haibin ; Wang, Xiumin ; Xiao, Ying
Author_Institution :
College of Information Engineering, China JiLiang University, CJLU, HangZhou, China
Abstract :
This paper present circuit architecture for 16-order FIR filter on FPGA. First, It introduce the principle of Distributed Arithmetic (DA) and DA-Offset Binary Coding (DA-OBC). Second, The circuit design of FIR low-pass filter base on DA-OBC algorithm is proposed and synthesized under the integrated environment of maxplus 2. The simulation results shows that the implementation works well and meets requirements.
Keywords :
Field programmable gate arrays; Finite impulse response filter; MATLAB; Simulation; Table lookup; DA; DA-OBC; FIR filter; FPGA; component; lookup table (LUT);
Conference_Titel :
Information Science and Engineering (ICISE), 2010 2nd International Conference on
Conference_Location :
Hangzhou, China
Print_ISBN :
978-1-4244-7616-9
DOI :
10.1109/ICISE.2010.5691156
