DocumentCode :
2146060
Title :
Verifying safety and liveness for the FlexTM hybrid transactional memory
Author :
Abdulla, Parosh ; Dwarkadas, Sandhya ; Rezine, Ahmed ; Shriraman, Arrvindh ; Zhu, Yunyun
Author_Institution :
Uppsala University, Sweden
fYear :
2013
fDate :
18-22 March 2013
Firstpage :
785
Lastpage :
790
Abstract :
We consider the verification of safety (strict serializability and abort consistency) and liveness (obstruction and livelock freedom) for the hybrid transactional memory framework FlexTM. This framework allows for flexible implementations of transactional memories based on an adaptation of the MESI coherence protocol. FlexTM allows for both eager and lazy conflict resolution strategies. Like in the case of Software Transactional Memories, the verification problem is not trivial as the number of concurrent transactions, their size, and the number of accessed shared variables cannot be a priori bounded. This complexity is exacerbated by aspects that are specific to hardware and hybrid transactional memories. Our work takes into account intricate behaviours such as cache line based conflict detection, false sharing, invisible reads or non-transactional instructions. We carry out the first automatic verification of a hybrid transactional memory and establish, by adopting a small model approach, challenging properties such as strict serializability, abort consistency, and obstruction freedom for both an eager and a lazy conflict resolution strategies. We also detect an example that refutes livelock freedom. To achieve this, our prototype tool makes use of the latest antichain based techniques to handle systems with tens of thousands of states.
Keywords :
Abstracts; Flexible printed circuits; Hardware;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013
Conference_Location :
Grenoble, France
ISSN :
1530-1591
Print_ISBN :
978-1-4673-5071-6
Type :
conf
DOI :
10.7873/DATE.2013.167
Filename :
6513613
Link To Document :
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