DocumentCode :
2146313
Title :
A critical review of charge-trapping NAND flash devices
Author :
Hang-Ting Lue ; Sheng-Chih Lai ; Tzu-Hsuan Hsu ; Yi-Hsuan Hsiao ; Pei-Ying Du ; Szu-Yu Wang ; Kuang-Yeu Hsieh ; Liu, Richard ; Chih-Yuan Lu
Author_Institution :
Emerging Central Lab., Macronix Int. Co., Ltd., Hsinchu, Taiwan
fYear :
2008
fDate :
20-23 Oct. 2008
Firstpage :
807
Lastpage :
810
Abstract :
This paper carefully analyzes various charge-trapping NAND Flash devices including SONOS, MANOS, BE-SONOS, BE-MANOS, and BE-MAONOS. The erase mechanisms using electron de-trapping or hole injection, and the role of the high-k top dielectric (Al2O3) are critically examined. In addition to the intrinsic charge-trapping properties, the STI edge geometry in the NAND array also plays a crucial role in determining the programming/erasing and reliability characteristics. Erase saturation and incremental-step-pulse programming (ISPP) characteristics are strongly affected by the STI edge effects. Our analysis of recent progress provides a clear understanding to charge-trapping NAND devices and serves as a guideline for future development.
Keywords :
NAND circuits; alumina; electron traps; flash memories; high-k dielectric thin films; reviews; BE-MANOS; BE-MAONOS; BE-SONOS; MANOS; SONOS; charge-trapping NAND Flash devices; electron de-trapping; erase saturation; high-k top dielectric; hole injection; incremental-step-pulse programming; reliability characteristics; Breakdown voltage; Current density; Dielectric devices; Electron traps; High K dielectric materials; High-K gate dielectrics; Photonic band gap; SONOS devices; Testing; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
Type :
conf
DOI :
10.1109/ICSICT.2008.4734663
Filename :
4734663
Link To Document :
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