Title :
Characteristics of sub-100nm ferroelectric field effect transistor with high-k buffer layer
Author :
Jin, Rui ; Song, Yuncheng ; Ji, Min ; Xu, Honghua ; Kang, Jinfeng ; Han, Ruqi ; Liu, Xiaoyan
Author_Institution :
Key Lab. of Microelectron. Devices & Circuits, Peking Univ., Beijing, China
Abstract :
The simulation work is carried out using two dimension device simulator to investigate the characteristics of sub-100 nm ferroelectric field effect transistor (FeFET) with high-k material as the buffer layer. Different configurations of gate stack are simulated and analyzed. It is shown that the structure of double-layer buffer can improve the device performance efficiently. Some important issues for FeFET scaling down are also discussed in this paper.
Keywords :
buffer layers; ferroelectric devices; field effect transistors; double-layer buffer; ferroelectric field effect transistor; gate stack; high-k buffer layer; size 100 nm; two-dimension device simulator; Buffer layers; Capacitors; Circuit simulation; FETs; Ferroelectric materials; High K dielectric materials; High-K gate dielectrics; Polarization; Semiconductor process modeling; Threshold voltage;
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
DOI :
10.1109/ICSICT.2008.4734676
