Title :
Yield analysis methods in 65nm technology Development
Author :
Susu Wei ; Liu, Eric ; Wei, Lucy
Author_Institution :
SMIC, China
Abstract :
For the new technology development, normal yield improvement methods useful to production are not enough. In the early phases, without yield signature, many systematic issues can not be captured by WAT or inline defect inspections. We need to create new analysis methods based on the technology development different phases. At the same time, multiple issues usually mix together and are not easy to be distinguished. So the selection of test chips, EFA (electrical failure analysis), PFA (physical failure analysis) and DFA (data failure analysis) methods become more important. This paper mainly focuses on the yield improvement methodologies in 65 nm three phases at foundry.
Keywords :
SRAM chips; circuit reliability; failure analysis; data failure analysis; electrical failure analysis; physical failure analysis; yield analysis; Computed tomography; Doped fiber amplifiers; Doping; Failure analysis; MOS devices; Random access memory; Scattering; Silicon; Testing; Virtual colonoscopy;
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
DOI :
10.1109/ICSICT.2008.4734755