GaAs/Si metal waferbonding for heterogeneous integrated circuits

Author

Bickford, Justin ; Lau, S.S. ; Yu, Paul K L

Author_Institution

Univ. of California, La Jolla, CA, USA

fYear

2008

fDate

20-23 Oct. 2008

Firstpage

1180

Lastpage

1183

Abstract

Different wafer bonding techniques for heterogeneous integration are compared; in particular, the advantages and disadvantages of metal bonding using isothermal solidification (ITS) process are investigated. In applying the ITS metal bonding to Si and GaAs integrated circuits, two distinct approaches - pre-patterning and post-patterning, are developed and the resulting metal bond properties, such as electrical contact and thermal conductivities, are presented.

Keywords

III-V semiconductors; elemental semiconductors; gallium arsenide; isothermal transformations; monolithic integrated circuits; ohmic contacts; silicon; solidification; thermal conductivity; wafer bonding; GaAs; ITS process; Si; heterogeneous integrated circuits; isothermal solidification; metal wafer bonding techniques; ohmic contact; post-patterning process; pre-patterning process; thermal conductivities; Contacts; Dielectrics and electrical insulation; Gallium arsenide; Isothermal processes; Microwave devices; Temperature; Thermal conductivity; Thermal expansion; Thermal stresses; Wafer bonding;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-2185-5

Electronic_ISBN

978-1-4244-2186-2

Type

conf

DOI

10.1109/ICSICT.2008.4734757

Filename

4734757