Title :
Interface engineering for high-k/Ge gate stack
Author :
Xie, Ruilong ; Zhu, Chunxiang
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore
Abstract :
In this paper, various interface engineering techniques for high-k/Ge gate stack for advanced CMOS device applications are reviewed. High-k gate stack formation on Ge substrate is first addressed with emphasis on pre-gate surface passivation. Post gate dielectric (post-gate) treatments are then discussed to further improve the high-k/Ge interface quality.
Keywords :
CMOS integrated circuits; field effect integrated circuits; semiconductor technology; substrates; Ge substrate; advanced CMOS device application; high-k gate stack formation; high-k/Ge gate stack; interface engineering; post gate dielectric treatment; pregate surface passivation; Annealing; Atomic measurements; Dielectric substrates; Electric variables; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Passivation; Silicon; Surface treatment;
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
DOI :
10.1109/ICSICT.2008.4734778
