Single Event Effect Rate Analysis and Upset Characterization of FPGA Digital Signal Processors

Charged particle induced upsets in the operation of Digital Signal Processors (DSP) are analyzed for on-orbit upset rate estimates. DSPs embedded in configuration hardened and non-hardened Field Programmable Gate Arrays (FPGA) are both studied for proton and heavy ion effects. The results reinforce the importance on the resulting upset rate of the mathematical fit parameters extracted from the experimental data.