DocumentCode :
2149544
Title :
Influence of device scaling on low-frequency noise in SOI tri-gate N- and p-type Si nanowire MOSFETs
Author :
Koyama, Masanori ; Casse, M. ; Coquand, R. ; Barraud, S. ; Ghibaudo, Gerard ; Iwai, Hisato ; Reimbold, Gilles
Author_Institution :
CEA LETI, Grenoble, France
fYear :
2013
fDate :
16-20 Sept. 2013
Firstpage :
300
Lastpage :
303
Abstract :
Low-frequency noise (LFN) has been investigated in tri-gate (TG) Si nanowire (NW) FET. We have carefully measured and analyzed LFN for gate length down to 40 nm and cross-section width down to 10 nm. Drain current noise spectral density has been measured in linear region from weak to strong inversion of transistor operation. In particular, we have shown that the LFN behavior is in good agreement with carrier number fluctuations with correlated mobility fluctuations model in ultra-scaled TGNW FETs. We did not observe large contribution due to surface orientation difference between (100) top and (110) side-wall surfaces of TGNW. Moreover, the extracted oxide trap density is roughly the same for reference wide devices and TGNW FETs without significant impact of channel area downscaling and geometry.
Keywords :
MOSFET; elemental semiconductors; nanowires; silicon; silicon-on-insulator; SOI; Si; correlated mobility fluctuations; device scaling; drain current noise spectral density; extracted oxide trap density; low frequency noise; nanowire MOSFET; reference wide devices; surface orientation; Current measurement; Field effect transistors; Logic gates; MOS devices; Noise; Noise measurement; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference (ESSDERC), 2013 Proceedings of the European
Conference_Location :
Bucharest
Type :
conf
DOI :
10.1109/ESSDERC.2013.6818878
Filename :
6818878
Link To Document :
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