Highly-integrated low-power WCDMA SiGe transceiver for mobile terminals

Highly-integrated low-power WCDMA transceiver chipset for mobile terminals is presented. The transceiver integrates full functionality, including receiving and demodulating radio signals in a receiver chip; modulating and transmitting baseband signals in a transmitter chip and a synthesizer chip that integrates IF PLL and two RF PLLs. A noise figure of 4.9dB, in-band IIP3 of -16dBm and out-band IIP3 of -6dBm with a maximum gain of 94.5dB is achieved for the total receiver path. The transmitter provides a gain control range of 82dB and a gain control resolution of 1dB to satisfy the power control requirement of the WCDMA system with a margin for process variations. The measured error vector magnitude (EVM) of the transmitter at output power of 0dBm is 4.3%. Implemented using in 0.35μm SiGe BiCMOS process, the receiver consumes 27.5mA, the transmitter consumes from 44mA to 88mA as the output power varies from -82dBm to 0dBm and the IF PLL and RF PLL in the synthesizer chip consumes 16mA and 14mA, respectively.