Design guidelines for deep-submicrometer MOSFETs

Author

Jeng, M. ; Chung, J. ; Moon, J.E. ; May, G. ; Ko, P.K. ; Hu, C.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

fYear

1988

fDate

11-14 Dec. 1988

Firstpage

386

Lastpage

389

Abstract

A comprehensive study of the performance and reliability constraints on the dimensions and power supply of deep-submicrometer non-LDD (lightly doped drain) n-channel MOSFETs is presented. Design guidelines extracted from experimental results are presented that are based on the following factors: short-channel effects; drain-induced barrier-lowering effects, off-state leakage currents, hot-electron reliability, time-dependent dielectric breakdown, current-driving capability, voltage gain, and switching speed. The relative importance of each mechanism for a given technology and design is examined. As an example, a set of design curves using typical performance and reliability criteria is provided for n-channel deep-submicrometer devices. With slight modifications, these design curves can also be extended to other technologies, including p-channel and LDD devices.<>

Keywords

design engineering; insulated gate field effect transistors; reliability; current-driving capability; deep-submicrometer MOSFETs; design curves; dimensions; drain-induced barrier-lowering effects; hot-electron reliability; n-channel MOSFETs; off-state leakage currents; power supply; reliability constraints; short-channel effects; switching speed; time-dependent dielectric breakdown; voltage gain; Current measurement; Dielectric measurements; Guidelines; Ice; Leakage current; MOSFETs; Moon; Power engineering computing; Power supplies; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Type

conf

DOI

10.1109/IEDM.1988.32837

Filename

32837