DocumentCode
2152912
Title
Design of digital three-phase SPWM signal generation system based on SoC
Author
Yang, Yuan ; Wang, Yong ; Gao, Yong
Author_Institution
Electron Eng. Dept., Xi´´an Univ. of Technol., Xi´´an, China
fYear
2008
fDate
20-23 Oct. 2008
Firstpage
1889
Lastpage
1892
Abstract
With the developing of the integrated circuit design and fabrication technology gradually, system-on-chip (SoC) technology has been widely used because of its high performance such as small size, low power consumption and so on. This paper describes a digital three-phase SPWM signal generation SoC based on OpenRISC1200, a 32-bit RISC processor core. The system integrates parameter controlling, displaying and signal generating on one chip, and therefore improving many inconveniences from its original separate controlling. In this SoC design, software/hardware co-design method is adopted, and system level verification based on Cyclone II FPGA (EP2C35F672) of Altera is carried out. The test results show that the design achieves the design specification perfectly.
Keywords
digital signal processing chips; field programmable gate arrays; hardware-software codesign; integrated circuit design; pulse width modulation; reduced instruction set computing; system-on-chip; waveform generators; 32-bit RISC processor core; Cyclone II FPGA; OpenRISC1200; digital three-phase SPWM signal generation; integrated circuit design; sinusoidal pulse width modulation; software-hardware codesign; system level verification; system-on-chip; Control systems; Energy consumption; Fabrication; Integrated circuit synthesis; Integrated circuit technology; Reduced instruction set computing; Signal design; Signal generators; Signal processing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-2185-5
Electronic_ISBN
978-1-4244-2186-2
Type
conf
DOI
10.1109/ICSICT.2008.4734928
Filename
4734928
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