Breakdown voltage improvement of standard MOS technologies targeted at smart power

Author

Santos, P. Mendonça ; Simas, M. I Castro ; Lanca, M. ; Finco, S. ; Behrens, F.H.

Author_Institution

Instituto Superior Tecnico, CEAUTL, Lisbon, Portugal

Volume

2

fYear

1995

fDate

8-12 Oct 1995

Firstpage

937

Abstract

This paper presents and discusses trade-offs of three different design techniques intended to improve the breakdown voltage of n-type lateral medium power transistors to be fabricated in a conventional low cost CMOS technology. A thorough analysis of the static and dynamic characteristics of the modified structures was carried out with the support of a two-dimensional device simulator. The motivation behind this work was the construction of a low cost smart power microsystem, including control, sensing and protection circuitries, targeted at an electronic ballast for efficient control of the power delivered to fluorescent lamps

Keywords

MOSFET; electric breakdown; fluorescent lamps; lamp accessories; power MOSFET; power control; power integrated circuits; protection; CMOS technology; breakdown voltage improvement; control circuits; dynamic characteristics; electronic ballast; fluorescent lamps; n-type lateral medium power transistors; power control; protection circuits; sensing circuits; smart power microsystem; static characteristics; two-dimensional device simulator; CMOS technology; Circuit topology; Costs; Electronic ballasts; Frequency; Integrated circuit technology; Power integrated circuits; Power transistors; Protection; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Industry Applications Conference, 1995. Thirtieth IAS Annual Meeting, IAS '95., Conference Record of the 1995 IEEE

Conference_Location

Orlando, FL

ISSN

0197-2618

Print_ISBN

0-7803-3008-0

Type

conf

DOI

10.1109/IAS.1995.530401

Filename

530401