Recent advances in digital-domain background calibration techniques for multistep analog-to-digital converters

An overview of the recent advances in digital-domain linearity enhancement techniques for multistep analog-to-digital converters (ADCs) is presented. Leveraging on increasingly more abundant on-chip processing, a built-in digital adaptability arises as the common denominator underlying most of these approaches. A multitude of the techniques are analyzed in this paper with the associated complexity, limitations, and potentials pointed out. The brief review serves as a stepping-stone for (and entails) more advanced studies in this booming field.