Title :
Compromised impedance match design for signal integrity of pogo pins structures with different signal-ground patterns
Author :
Sun, Ruey-Bo ; Wu, Ruey-Beei ; Hsiao, Shih-Wei
Author_Institution :
Dept. of Electr. Eng. & Grad. Inst. of Commun. Eng., Nat. Taiwan Univ., Taipei
Abstract :
This paper proposes a systematic methodology to model the single-ended and differential pogo pin structures for the analysis of signal integrity (SI), especially the reflected noise. A measurement method is developed for de-embedding the specialized fixture in the characterization of the pogo pins. The simulation and modeling methodologies are verified by the favorable comparison with the measured results from DC to 10 GHz. Finally, an applicable range of impedance for satisfying the desired specifications of return loss is derived. By a design chart of the impedance versus the pogo pin geometry, the compromised impedance design charts for small reflection in different S/G ratios and pin patterns are given.
Keywords :
electric impedance; electrical engineering computing; electron device testing; electronic equipment testing; impedance matching; compromised impedance match design; de-embedding; differential pogo pin structures; pin patterns; pogo pin geometry; reflected noise; return loss; signal ground pattern; signal integrity; single-ended pogo pin structures; Crosstalk; Equivalent circuits; Fixtures; Geometry; Impedance; Pattern matching; Pins; Reflection; Signal design; System testing;
Conference_Titel :
Signal Propagation on Interconnects, 2009. SPI '09. IEEE Workshop on
Conference_Location :
Strasbourg
Print_ISBN :
978-1-4244-4490-8
Electronic_ISBN :
978-1-4244-4489-2
DOI :
10.1109/SPI.2009.5089838
