Title :
High frequency characterization and modeling of high density TSV in 3D integrated circuits
Author :
Bermond, C. ; Cadix, L. ; Farcy, A. ; Lacrevaz, T. ; Leduc, P. ; Fléchet, B.
Author_Institution :
IMEP-LAHC, Univ. de Savoie, Le Bourget du Lac
Abstract :
High frequency characterization and modeling of Through Silicon Vias (TSVs) for new 3D chip staking are presented in this paper. Works focus on high density TSVs, up to 106 cm-2, with pitch below 10 mum and aggressive wafer thinning to maintain TSV aspect ratio in a range between 5 and 10. Equivalent electrical RLCG models of TSVs with height of 15 mum and diameter of 3 mum are extracted up to 20 GHz. It is shown that values extracted for components are directly related to design and material characteristics used to process 3D TSVs.
Keywords :
integrated circuit design; integrated circuit modelling; 3D TSV material characteristics; 3D chip staking; 3D integrated circuits; aggressive wafer thinning; equivalent electrical RLCG model; high density TSV modeling; high frequency characterization; size 15 mum; size 3 mum; through silicon vias modeling; Copper; Electric variables measurement; Frequency; Impedance; Integrated circuit modeling; Semiconductor device modeling; Silicon; Testing; Three-dimensional integrated circuits; Through-silicon vias;
Conference_Titel :
Signal Propagation on Interconnects, 2009. SPI '09. IEEE Workshop on
Conference_Location :
Strasbourg
Print_ISBN :
978-1-4244-4490-8
Electronic_ISBN :
978-1-4244-4489-2
DOI :
10.1109/SPI.2009.5089840
