Title :
Efficient encoding scheme for folding ADC
Author :
Liu, Zhen ; Jia, Song ; Wang, Yuan ; Ji, Lijiu ; Zhang, Xing
Author_Institution :
Key Lab. of Microelectron. Devices & Circuits, Peking Univ., Peking, China
Abstract :
An efficient encoding scheme is proposed for folding ADC. In the encoder, XOR-OR encoding algorithm and dynamic domino circuit are adopted. A novel method for wide-range error correction and bit synchronization is presented. Simulation results show that the proposed encoder has several advantages: high speed, low power dissipation and small chip area.
Keywords :
analogue-digital conversion; encoding; logic gates; low-power electronics; synchronisation; XOR-OR encoding algorithm; analogue-digital conversion; bit synchronization; dynamic domino circuit; efficient encoding scheme; folding ADC; low power dissipation; wide-range error correction; Binary codes; Circuit simulation; Encoding; Error correction; Logic circuits; Microelectronics; Power dissipation; Read only memory; Timing; Voltage;
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
DOI :
10.1109/ICSICT.2008.4734953
