The use of selective electroless metal deposition for micron size contact fill

Author

Wei, C.S. ; Fraser, D.B. ; Wu, A.T. ; Paunovic, M. ; Ting, C.H.

Author_Institution

Intel Corp., Santa Clara, CA, USA

fYear

1988

fDate

11-14 Dec. 1988

Firstpage

446

Lastpage

449

Abstract

A novel method of filling micron-size contact holes using the selective electroless metal deposition (SEMD) technique has been developed and demonstrated on advanced device technology. The selective process is based on the electroless deposition of palladium or nickel only in CoSi/sub 2/ or TiSi/sub 2/ based contact holes but not on dielectric films such as BPSG. Excellent planarization of contact holes and good electrical properties such as junction integrity, good transistor characteristics, and good contact resistance have been obtained. To improve the temperature stability of the contact material, selective W is deposited in TiSi/sub 2/-based contacts; good junction integrity and low contact resistance were obtained up to 450 degrees C.<>

Keywords

VLSI; electroless deposition; integrated circuit technology; metallisation; nickel; palladium; 450 C; Ni selective deposition; Ni-CoSi/sub 2/; Ni-TiSi/sub 2/; Pd selective deposition; Pd-CoSi/sub 2/; Pd-TiSi/sub 2/; SEMD; TiSi/sub 2/ based contact holes; contact material; contact resistance; electrical properties; junction integrity; micron size contact fill; planarization of contact holes; selective electroless metal deposition; temperature stability; transistor characteristics; Contact resistance; Electromigration; Filling; Nickel; Palladium; Planarization; Plugs; Silicides; Surface topography; Tungsten;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Type

conf

DOI

10.1109/IEDM.1988.32851

Filename

32851