• DocumentCode
    2154606
  • Title

    A CMOS 21-48GHz fractional-N synthesizer employing ultra-wideband injection-locked frequency multipliers

  • Author

    Li, Aoxue ; Shiyuan Zheng ; Jun Yin ; Luong, Howard C. ; Xun Luo

  • Author_Institution
    Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong, China
  • fYear
    2013
  • fDate
    22-25 Sept. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Higher-order LC tanks with proper design parameters are proposed to widen the phase response to enhance the frequency locking range of mm-Wave injection-locked frequency multipliers (ILFMs). Employing a chain of such ILFMs at the output, a complete ultra-wideband fractional-N frequency synthesizer is demonstrated. Fabricated using a 65nm CMOS process, the synthesizer prototype measures a continuous output frequency tuning range of 80.2% from 20.6GHz to 48.2GHz when locked to a 4.5GHz to 6.1GHz fractional-N PLL with excellent phase noise <; -107dBc/Hz at 1MHz offset while consuming 148 mW.
  • Keywords
    CMOS analogue integrated circuits; frequency multipliers; phase locked loops; CMOS fractional-N synthesizer; ILFMs; SHI-PLL; design parameters; fractional-N PLL; frequency 20.6 GHz to 48.2 GHz; frequency 4.5 GHz to 6.1 GHz; frequency locking range; higher-order LC tanks; mm-wave injection-locked frequency multipliers; phase response; power 148 mW; size 65 nm; synthesizer prototype; ultra-wideband fractional-N frequency synthesizer; ultra-wideband injection-locked frequency multipliers; CMOS integrated circuits; CMOS technology; Frequency measurement; Frequency synthesizers; Phase locked loops; Phase noise; Resonant frequency;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference (CICC), 2013 IEEE
  • Conference_Location
    San Jose, CA
  • Type

    conf

  • DOI
    10.1109/CICC.2013.6658411
  • Filename
    6658411