DocumentCode :
2154853
Title :
Stacked capacitor cells for high-density dynamic RAMs
Author :
Watanabe, H. ; Kurosawa, K. ; Sawada, S.
Author_Institution :
Toshiba Corp., Kawasaki, Japan
fYear :
1988
fDate :
11-14 Dec. 1988
Firstpage :
600
Lastpage :
603
Abstract :
A novel process sequence fabricating stacked capacitor cells has been developed for high-density dynamic RAMs (random access memories). Enhanced cell capacitance can be obtained by opening the contact window for the lower electrode of the stacked capacitor after the deposition of the electrode poly-Si. This is followed by additional substrate Si etching. The procedure results in sufficient cell capacitance even in 64-Mb dynamic RAMs.<>
Keywords :
VLSI; field effect integrated circuits; integrated circuit technology; integrated memory circuits; random-access storage; 64 Mbit; DRAMs; ULSI; additional substrate Si etching; cell capacitance; cell capacitance enhancement; high-density dynamic RAMs; lower electrode contact window; polycrystalline Si electrodes; process sequence; random access memories; stacked capacitor cells; Capacitance; Capacitors; DRAM chips; Electrodes; Ion implantation; Semiconductor devices; Semiconductor films; Stacking; Substrates; Ultra large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
ISSN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.1988.32886
Filename :
32886
Link To Document :
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