DocumentCode :
2155156
Title :
Energy centric model of SRAM write operation for improved energy and error rates
Author :
Ghosh, Sudip
Author_Institution :
Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA
fYear :
2013
fDate :
22-25 Sept. 2013
Firstpage :
1
Lastpage :
4
Abstract :
We propose an energy centric model of SRAM write operation. The model provides useful insights about energy and write error rates. We introduce the concept of intrinsic energy margin induced errors. The proposed model is employed for evaluating various write assist mechanisms and their potential in reducing the intrinsic memory error rates. We also demonstrate that this model can be used for optimizing energy of memory arrays.
Keywords :
SRAM chips; logic design; SRAM write operation; energy centric model; energy rates; intrinsic energy margin induced errors; intrinsic memory error rates; memory arrays; write assist mechanisms; write error rates; Computational modeling; Energy barrier; Error analysis; Mathematical model; Noise; Optimization; Random access memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2013 IEEE
Conference_Location :
San Jose, CA
Type :
conf
DOI :
10.1109/CICC.2013.6658429
Filename :
6658429
Link To Document :
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