• DocumentCode
    2155234
  • Title

    A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation

  • Author

    Das, S. ; Dasika, Ganesh ; Shivashankar, Karthik ; Bull, David

  • Author_Institution
    ARM Ltd., Cambridge, UK
  • fYear
    2013
  • fDate
    22-25 Sept. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    We describe the implementation and silicon measurement results from a Razor-based hardware loop-accelerator (RZLA), implementing the Sobel edge-detection algorithm. We demonstrate robust operation with a large Dynamic Voltage Scaling (DVS) range achieved using 50% of the clock-period for timing-speculation. At 1GHz operating frequency, Razor DVS enables 34% energy-efficiency improvement on a per-device basis and 33% overall on the entire batch of devices.
  • Keywords
    edge detection; energy conservation; flip-flops; DVS; RZLA; Razor-based dynamic adaptation; Razor-based hardware loop-accelerator; Sobel edge-detection algorithm; dynamic voltage scaling; energy-efficient operation; frequency 1 GHz; silicon measurement; Clocks; Energy efficiency; Hardware; Latches; Microprocessors; Timing; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference (CICC), 2013 IEEE
  • Conference_Location
    San Jose, CA
  • Type

    conf

  • DOI
    10.1109/CICC.2013.6658432
  • Filename
    6658432