DocumentCode
2155901
Title
Non-overlapping super self-aligned BiCMOS with 87 ps low power ECL
Author
Chiu, T.-Y. ; Chin, G.M. ; Lau, M.Y. ; Hanson, R.C. ; Morris, M.D. ; Lee, K.F. ; Voshchenkov, A.M. ; Swatrz, R.G. ; Archer, V.D. ; Liu, M.T.Y. ; Finegan, S.N. ; Feuer, M.D.
Author_Institution
AT&T Bell Lab., Holmdel, NJ, USA
fYear
1988
fDate
11-14 Dec. 1988
Firstpage
752
Lastpage
755
Abstract
It is demonstrated that high-speed bipolar and CMOS processes can be merged without compromise on either device. A NOVA (nonoverlapping super self-aligned) structure with an advanced epi/isolation process that reduces parasitic capacitances and resistances is reported. The scheme combines lateral autodoping free epi deposition with a novel fully recessed oxide process. This approach significantly simplifies the isolation process and is an important factor in achieving high speed with a conservative 1.5- mu m design rule. A high-speed frequency divider, a multiplexer, and a demultiplexer operating up to 4.1 GHz, 5.5 Gb/s, and 6.2 Gb/s, respectively, have been fabricated. The results show that NOVA BiCMOS is suitable for Gb/s digital VLSI application.<>
Keywords
BIMOS integrated circuits; VLSI; digital integrated circuits; emitter-coupled logic; integrated logic circuits; 1.5 micron; 4.1 to 6.2 Gbit/s; 87 ps; BiCMOS; Gb/s digital VLSI application; NOVA structure; advanced epi/isolation process; demultiplexer; fully recessed oxide process; high speed operation; high-speed frequency divider; lateral autodoping free epi deposition; low power ECL; multiplexer; nonoverlapping super self-aligned; Application specific integrated circuits; BiCMOS integrated circuits; CMOS technology; Conductivity; Etching; Fabrication; Implants; Isolation technology; Signal processing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Type
conf
DOI
10.1109/IEDM.1988.32921
Filename
32921
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