Performance evolution with DSP and transputer based systems in real-time signal processing and control applications

This paper presents an investigation into the performance evolution in relation to load size of parallel computing architectures incorporating digital signal processing (DSP) devices and transputers in real-time applications. Three computing domains, namely the TMS320C40 DSP device, the i860 vector processor and the T805 transputer are considered. An adaptive filtering algorithm and a flexible beam simulation algorithm are chosen and implemented on these platforms to highlight the main characteristics of the processors and assess their performances.