Title :
A New Design and Implementation of the Butterfly Unit on FPGA
Author :
Yang Jun ; Ding Jun ; Li Na ; Guo Yixiong
Author_Institution :
Sch. of Inf. Sci. & Eng., Yunnan Univ., Kunming, China
Abstract :
This paper presents a new method to implement the butterfly unit of FFT processor, based on the coordinate transformation and CORDIC algorithm. The butterfly unit uses less resource and reaches higher speed, also can be configured by parameter and satisfied by the real time operations. Finally, it can work on the frequency of 50 MHz after the design is downloaded to a chip EP2C20F484C7.
Keywords :
digital computers; field programmable gate arrays; CORDIC algorithm; FFT processor; FPGA; butterfly unit; chip EP2C20F484C7; coordinate rotation digital computer; Algorithm design and analysis; Design engineering; Equations; Field programmable gate arrays; Frequency; Hardware; Information science; Iterative algorithms; Table lookup; Vectors;
Conference_Titel :
Image and Signal Processing, 2009. CISP '09. 2nd International Congress on
Conference_Location :
Tianjin
Print_ISBN :
978-1-4244-4129-7
Electronic_ISBN :
978-1-4244-4131-0
DOI :
10.1109/CISP.2009.5304123
