Complementary DMOS/BiCMOS technology for power IC applications

A power integrated circuit technology capable of integrating complementary power double-diffused MOS (DMOS) output devices with high-performance BiCMOS analog and digital components is described. The PDMOS output device is incorporated to address the class of applications which require complementary power outputs, but for which lateral p-n-p bipolars or charge-pumped NDMOS transistors are unsuitable. Power DMOS characteristics are optimized by the use of a thin-well architecture with n+ and p+ polysilicon gate technology. Important features of the technology are area-competitive 80-120-V power DMOS with logic-level-compatible threshold voltages, fine-feature-size CMOS with nanosecond stage delays, high-accuracy bipolar capability, and oxide-isolated polysilicon diodes. The technology was used successfully to fabricate individual test devices: subcircuit elements such as inverters, ring oscillators, references, comparators, and op amps; and commercial circuit designs.<>