Behavioral modeling of RF and microwave circuit blocks for hierarchical simulation of modern transceivers

The development of simulation and macro-modeling techniques for RF and microwave communication systems has been a high priority research subject for several years. If one observed this last years an impressive improvement of simulation tools performances, the full chip simulation of modern TX-RX chains remains a real stumbling block, as the transistor count has considerably increased. This paper discusses the hierarchical RF simulation issue using the same harmonic balance or envelope transient simulation engine for both transistor level description and circuit block macro-models. This method can reduce the size of the problem to enable accurate and fast simulation of large size circuits. The concept requires however to develop macro-modeling techniques taking into account impedance mismatch effects, which are discussed here.