Title :
8.6 ps/gate chilled Si E/E NMOS integrated circuit
Author :
Kobayashi, T. ; Miyake, M. ; Okazaki, Y. ; Matsuda, T. ; Sato, M. ; Deguchi, K. ; Ohki, S. ; Oda, M.
Author_Institution :
LSI Lab., NTT, Kanagawa, Japan
Abstract :
The authors have designed optimum 1/4- mu m-gate-length NMOSFETs with improved hot-electron immunity. The lithographies used were direct electron-beam and SR (synchrotron radiation) lithography. SR was used for the metallization. The threshold voltage of the NMOSFETs was determined over the whole range of operating temperatures. The fabricated E/E (enhancement mode/enhancement mode) ring oscillators operated well from room temperature down to 4.2 K. The fastest speed of 8.6 ps/gate was achieved at 4.2 K by a 0.2- mu m-gate-length ring oscillator.<>
Keywords :
cryogenics; elemental semiconductors; field effect integrated circuits; integrated logic circuits; silicon; 0.2 to 0.25 micron; 4.2 to 293 K; 8.6 ps; NMOS integrated circuit; Si; cryogenic operation; digital circuits; direct electron-beam; enhancement mode/enhancement mode; high speed operation; hot-electron immunity; lithography; logic IC; metallization; ring oscillators; submicron gate length; synchrotron radiation; threshold voltage; Delay; Large scale integration; Lithography; MOS devices; MOSFET circuits; Metallization; Ring oscillators; Strontium; Temperature; Threshold voltage;
Conference_Titel :
Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/IEDM.1988.32951
