• DocumentCode
    2156689
  • Title

    Implementation of DTTB SRRC filter based on FPGA

  • Author

    Min-min, Zhuang ; Kai-Xiong, Su ; Xiao-zhen, Fu

  • Author_Institution
    College of Physics and Information Engineering of Fuzhou University, 350002, China
  • fYear
    2010
  • fDate
    4-6 Dec. 2010
  • Firstpage
    2129
  • Lastpage
    2131
  • Abstract
    Based on the design of SRRC roll-off filter used in DTTB system, a FPGA implementation method of using DA combined with the switch structure of multi-phase decomposition is proposed in this paper. The theoretical analysis and MATLAB simulation are adopted to verify the feasibility of the algorithm.
  • Keywords
    Field programmable gate arrays; Filtering algorithms; Finite impulse response filter; Interpolation; Low pass filters; Switches; Table lookup; DA; SRRC; multi-phase decomposition;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Science and Engineering (ICISE), 2010 2nd International Conference on
  • Conference_Location
    Hangzhou, China
  • Print_ISBN
    978-1-4244-7616-9
  • Type

    conf

  • DOI
    10.1109/ICISE.2010.5691591
  • Filename
    5691591
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2156689