DocumentCode
2157150
Title
CMOS circuit design of threshold gates with hysteresis
Author
Sobelman, Gerald E. ; Fant, Karl
Author_Institution
Theseus Logic Inc., St. Paul, MN, USA
Volume
2
fYear
1998
fDate
31 May-3 Jun 1998
Firstpage
61
Abstract
M-of-N threshold gates with hysteresis form a class of circuit elements that have important application in NULL Convention LogicTM , a novel asynchronous logic design methodology. General design guidelines for these M-of-N gates are presented using CMOS technology. Three types of circuit implementations are discussed: static, semi-static and dynamic. In addition, initialization techniques are presented for use in establishing a known initial state
Keywords
CMOS logic circuits; asynchronous circuits; hysteresis; logic design; logic gates; threshold elements; CMOS circuit element; M-of-N threshold gate; NULL Convention Logic; asynchronous logic design; dynamic circuit; hysteresis; initialization; semi-static circuit; static circuit; CMOS logic circuits; CMOS technology; Circuit synthesis; Clocks; Design methodology; Digital systems; Hysteresis; Logic circuits; Logic design; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-4455-3
Type
conf
DOI
10.1109/ISCAS.1998.706841
Filename
706841
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