A novel S/H circuit based on clock-controlled neuron-MOS transistor

A new sample and hold (S/H) circuit using clock-controlled neuron-MOS transistor is presented. By employing a threshold compensation cell, the problem of threshold loss between the input voltage and the output voltage of a single neuron-MOS transistor-based source-follower, is solved, and thereby the accuracy of the circuit is improved. Due to applying threshold compensation technique, the proposed S/H circuit is suitable for low-voltage operation. Besides, by utilizing a high-functionality clock-controlled neuron-MOS transistor, the proposed S/H circuit has considerable simpler structure and achieves higher power saving than conventional implementations. The HSPICE simulation results using TSMC 0.35µm double-polysilicon CMOS technology validate the effectiveness of the proposed approach. Finally, a comparison is being made between the proposed circuit and previously reported ones.