A novel particle swarm optimization approach for VLSI routing

Rapid advances in VLSI technology has increased the chip density by constantly increasing the number of constituents on a single chip, as well as decreasing the chip feature size. In such a complex scenario the primary objective is to limit the power-delay product of the system. It can be done by reducing the interconnect delay by optimizing the wire lengths i.e. by the proper interconnection of all the nodes. The minimum cost of interconnection of all nodes can be found by a Rectilinear Steiner Minimal Tree (RSMT) formed by the nodes. The problem of finding a RSMT is an NP-complete one. Particle Swarm Optimization (PSO) is an efficient swarm intelligence algorithm which boasts of fast convergence and ease of implementation, capable of solving such a problem. This paper presents a novel discrete particle swarm optimization (DPSO) to solve the NP-complete problem i.e. finding the RSMT. A modified Prim´s Algorithm has been adopted for the purpose of finding the cost of the RSMT. A unique modification to the traditional PSO has been done by introducing the Mutation operation of Genetic Algorithm (GA) which produces up to 20% reduction in the wire lengths or cost of interconnections. Two versions of the DPSO algorithm - one with linearly decreasing inertia weight and another with self-adaptive inertia weight - have been employed and their results have been compared. Comparisons have also been made between the results available from recent work and our algorithm and the latter has established itself to superior in optimizing the interconnect lengths and thereby finding the lowest wire lengths.