DocumentCode :
2157622
Title :
Pulse amplification based dynamic synchronizers with metastability measurement using capacitance de-rating
Author :
Giridhar, B. ; Fojtik, Matthew ; Fick, David ; Sylvester, Dennis ; Blaauw, D.
Author_Institution :
Univ. of Michigan, Ann Arbor, MI, USA
fYear :
2013
fDate :
22-25 Sept. 2013
Firstpage :
1
Lastpage :
4
Abstract :
We present dynamic buffer based synchronizers where only pulses rather than stable intermediate voltages cause metastability. We exploit this unique feature by amplifying such pulses to improve MTBF by >106× over jamb latches and double flip-flops at 2GHz in 65nm CMOS. The synchronizers incur single-cycle latency with a MTBF of ~2×1011 years. A new method to experimentally measure metastability on chip is also proposed and used to evaluate synchronizer performance.
Keywords :
CMOS digital integrated circuits; buffer circuits; flip-flops; microprocessor chips; pulse amplifiers; CMOS; capacitance de-rating; chip metastability; double flip-flops; dynamic buffer; dynamic synchronizers; frequency 2 GHz; jamb latches; metastability measurement; pulse amplification; single-cycle latency; size 65 nm; Capacitance; Capacitance measurement; Delays; Extrapolation; Inverters; Latches; Synchronization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2013 IEEE
Conference_Location :
San Jose, CA
Type :
conf
DOI :
10.1109/CICC.2013.6658518
Filename :
6658518
Link To Document :
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