DocumentCode
2157756
Title
Fair-Priority-Expression-Based burst scheduling to enhance performance and fairness of shared dram systems
Author
Shi, Lei ; Pang, Jun ; Yang, Lei ; Zhang, Tiejun ; Wang, Donghui
Author_Institution
Inst. of Acoust., Chinese Acad. of Sci., Beijing
fYear
2009
fDate
3-6 May 2009
Firstpage
190
Lastpage
194
Abstract
Many algorithms of memory access scheduling have been studied to attack the well-known memory-wall. However, some of them introduce unfairness problem in Chip-Multi-Processor (CMP) systems. Therefore a new approach called Fair-Priority-Expression-Based (FairPEB) burst scheduling is proposed in this paper to address both performance and unfairness problems. Experiment results show that this method improves data bus utilization of memory system by 15.4% and 31.87% over conventional First-Ready First-Come-First-Service (FR-FCFS) and original burst scheduling. Furthermore it keeps memory accesses of different applications fair.
Keywords
DRAM chips; microprocessor chips; shared memory systems; chip-multiprocessor systems; fair-priority-expression-based burst scheduling; first-ready first-come-first-service; memory access scheduling; shared DRAM systems; Acoustics; Bandwidth; Control systems; Delay; Pipeline processing; Processor scheduling; Random access memory; Scheduling algorithm; System performance; Yarn; Multiprocessor; memory scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2009. CCECE '09. Canadian Conference on
Conference_Location
St. John´s, NL
ISSN
0840-7789
Print_ISBN
978-1-4244-3509-8
Electronic_ISBN
0840-7789
Type
conf
DOI
10.1109/CCECE.2009.5090118
Filename
5090118
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