Title :
A true 4-cycle lock reference-less all-digital burst-mode CDR utilizing coarse-fine phase generator with embedded TDC
Author :
Iizuka, Tetsuya ; Miura, Shun ; Ishizone, Yohei ; Murakami, Yasutaka ; Asada, Kunihiro
Author_Institution :
Dept. of Electr. Eng. & Inf. Syst., Univ. of Tokyo, Tokyo, Japan
Abstract :
This paper presents a reference-less all-digital burst-mode CDR using a coarse-fine phase generator with embedded TDC. It achieves true 4-cycle lock without any reference clocks and warm-ups, and eliminates dynamic power consumption in a stand-by state. Fabricated in 65nm CMOS, this CDR operates from 1.40 to 2.06Gb/s and consumes 9.6mW at 2.06Gb/s while occupying 80×80μm2 area.
Keywords :
CMOS digital integrated circuits; clock and data recovery circuits; low-power electronics; signal generators; time-digital conversion; CMOS process; bit rate 1.40 Gbit/s to 2.06 Gbit/s; coarse-fine phase generator; dynamic power consumption; embedded TDC; power 9.6 mW; size 65 nm; true 4-cycle lock reference-less all-digital burst-mode CDR; Clocks; Delay lines; Delays; Generators; Image edge detection; Jitter; Phase locked loops;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2013 IEEE
Conference_Location :
San Jose, CA
DOI :
10.1109/CICC.2013.6658550
